Job description

As a PDK Development Engineer you will be part of the team that implements Layout Cells and Layout Automation in Cadence Virtuoso environment. If you want to shape the future of the semiconductors industry, join our team Infineon Romania!

As a PDK Development Engineer for PCell Implementation, you implement layout cells and automation in Cadence Virtuoso, align with technology development, manage requirements, ensure quality, create documentation, and support global product development teams.

In your new role you will:

• Implement Layout Cells and Layout Automation in Cadence Virtuoso environment
• Align and plan implementation closely with Infineon’s technology development departments
• Manage the alignment of requirements with the technology team and implement them as a team
• Be responsible for automated quality assurance checks
• Create user documentation and trainings materials
• Support the global product development teams in the creation of their designs

You are dedicated to quality and efficiency and have the passion to develop new, innovative ideas. As a team player, you quickly establish successful cooperation, appreciate the contribution of others, and support your colleagues proactively.

You are best equipped for this task if you have:

• A university degree in Electrical Engineering, Computer Science or equivalent
• At least 3 years of experience with Cadence Virtuoso Schematic/Layout
• Good experience with Cadence SKILL programming language
• Experience with the PCell coding is a big plus
• The ability to manage a high degree of complexity thanks to good analytical skills, creativity, perseverance and a good sense of priorities
• Useful programming skills: UNIX, Python
• Fluent English skills